An internship at onsemi offers a dynamic opportunity to gain hands-on experience through real-world projects that drive innovation in the semiconductor industry. Interns are entrusted with meaningful responsibilities and exposed to cutting-edge technologies, fostering both technical skill development and professional growth.

onsemi views internships as a strategic pipeline for entry-level career positions, providing a collaborative and inclusive environment where interns work alongside diverse teams and contribute to high-impact initiatives. The company's commitment to sustainability, including its goal of achieving net-zero emissions by 2040, enables interns to engage in projects that align with global environmental priorities.

Key benefits include:

• Competitive compensation and medical benefits
• Flexible work hours aligned with academic schedules
• Access to Employee Resource Groups (ERGs) which foster a sense of belonging and provide opportunities for mentorship and community engagement
• Networking events, professional development workshops, and project showcases that build career readiness and visibility across the organization

Internship roles span multiple disciplines including engineering, business operations, data analytics, and finance, and are designed to align with onsemi's strategic goals of innovation and workforce development. Structured programs such as rotational field sales and finance analyst tracks offer additional career pathways for interns transitioning into full-time roles.

Required Qualifications:

• Currently enrolled students majoring in EE/CS or related field.
• Demonstrated programming skills in one or more of the following: C/C++, Java, Perl/Python, TCL/SVRF, Git
• Good knowledge of using layout design tools such as Cadence or Mentor.
• Excellent technical communication skills and English proficiency.
• Strong learning capability
• Good team player.

Preferred Qualifications:

• Familiar with semiconductor manufacturing processes. Basic Process and Device technology experience.
• Demonstrated skills/knowledge of design revision control systems such as Cliosoft, SVN or CVS.
• Advanced EDA flows and tools: Calibre DRV/MDPV, CAT, EBVIEW.
• Experience in FAB operation or process integration is a plus.
• Knowledge on Jenkins, CI/CD concepts is a plus.
• Completion of a Software Testing and Validation class or similar is a plus.

Required Qualifications:

• Currently enrolled students majoring in EE/CS or related field.
• Demonstrated programming skills in one or more of the following: C/C++, Java, Perl/Python, TCL/SVRF, Git
• Good knowledge of using layout design tools such as Cadence or Mentor.
• Excellent technical communication skills and English proficiency.
• Strong learning capability
• Good team player.

Preferred Qualifications:

• Familiar with semiconductor manufacturing processes. Basic Process and Device technology experience.

• Demonstrated skills/knowledge of design revision control systems such as Cliosoft, SVN or CVS.

• Advanced EDA flows and tools: Calibre DRV/MDPV, CAT, EBVIEW.

• Experience in FAB operation or process integration is a plus.

• Knowledge on Jenkins, CI/CD concepts is a plus.

• Completion of a Software Testing and Validation class or similar is a plus.

• Write automation scripts for basic layout and/or data prep functions.

• Support the development of RDP tool regression & release environment.

• Perform verification testcases for new RDP utilities.

• Support tape-out work to both internal FABs as well as external foundries.

• Perform DRC & LVS verification on chip design layouts when needed.

• Prepare reticle & mask data, collaborating with PDK team on data processing to ensure GR cleanness and data integrity.

• Coordinate QA on reticle data review and release and work with photomask shop venders on delivery.

• Interface with other engineering teams including Design, Fab, Tech Development as well as mask vendors to facilitate the flow from NPD to manufacturing.

• Write automation scripts for basic layout and/or data prep functions.

• Support the development of RDP tool regression & release environment.

• Perform verification testcases for new RDP utilities.

• Support tape-out work to both internal FABs as well as external foundries.

• Perform DRC & LVS verification on chip design layouts when needed.

• Prepare reticle & mask data, collaborating with PDK team on data processing to ensure GR cleanness and data integrity.

• Coordinate QA on reticle data review and release and work with photomask shop venders on delivery.

• Interface with other engineering teams including Design, Fab, Tech Development as well as mask vendors to facilitate the flow from NPD to manufacturing.