CAD/EDA – Silicon Design/Verification Infrastructure

P

PDDN INC.

CAD/EDA – Silicon Design/Verification Infrastructure

Seattle, WA
Full Time
Paid
  • Responsibilities

    Job Description

    Role: CAD/EDA – Silicon Design/Verification Infrastructure
    Location: San Francisco, CA / Seattle, WA / Santa Clara, CA
    Job Type: Contract
    Interview Mode: Phone/Skype

    Job Description:
    Seeking an experienced CAD/EDA Engineer for Silicon Design/Verification Infrastructure. Must have 5+ years in EDA/CAD SoC/IP design, System Verilog/UVM, ARM/RISC, NOC, Python (3.x), Linux (Shell scripting, Makefile), C programming, SoC verification, debugging, and cross-functional collaboration.

  • Qualifications

    Additional Information

    All your information will be kept confidential according to EEO guidelines.