PLEASE NOTE: US citizenship or permanent residency is REQUIRED for this position.

CESIUMASTRO is a rapidly growing space technology startup in Austin, Texas, developing out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. Our approach is unique, and our team is changing the world of space communications. Learn more about our company at https://www.cesiumastro.com.

We are looking to add an FPGA ENGINEER to our team. If you are great at what you do, enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design are also desirable.

The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.

CesiumAstro is proud to be an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

We provide a generous benefits and stock option package to all our employees.

SUCCESSFUL CANDIDATES WILL REQUIRE, AS A MINIMUM:

• Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
• Minimum of 2 years of industry or university research experience in design, analysis, and implementation of FPGA systems at the HDL level. MORE EXPERIENCED CANDIDATES ARE ALSO ENCOURAGED TO APPLY.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim, etc.).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

PREFERRED EXPERIENCE INCLUDES:

• Aerospace design and qualification.
• Worst-case analysis, failure method and criticality analyses, and reliability analysis.
• Experience with board-level hardware design.
• Familiarity with communications systems, such as digital signal processing.