Job Title: FPGA SV/UVM Verification Engineer Location: Remote

Job Description:

5+ Years of FPGA Requirement based Verification

Extensive experience with System Verilog & UVM Methodology (SV / UVM)

Test Bench architecture, Test Bench Troubleshooting, Test Case writing & Execution

Video/Image Processing Project Experience

Adherence to avionics products, process & documentation

DO-254 Process knowledge is desired

Remote / Open for Occasional Travel.

US Citizen / Green Card Only

This is a remote position.