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Senior Database Administrator

MaxLinear Inc.

Senior Database Administrator

National
Paid
  • Responsibilities

    Maxlinear is looking to hire a SOC Design Engineer in the ASIC group in the Bangalore Design Center who will design and implement CPU sub-systems, peripherals, communication interface logic including physical, link layer and transport layer designs for integrated Analog and Digital SOCs. The silicon devices are targeted to a variety of high speed, high reliability applications ranging from satellite receivers, wireless backhaul to wired and optical communications. Engineer should be well versed in industry standard design and verification methodologies. Knowledge and expertise with design and verification tools is a must. Experience in low power design is desirable.

     

    Required Skills

    • Strong and proven fundamentals in Digital logic design and verification, ASIC design methodology.
    • Experience in the design of embedded processor and multiprocessor environments. Knowledge of memory architecture and systems, bus architectures and standard peripherals.
    • Experience in design of systems with multiple asynchronous clocks.
    • Experience with high speed communication and I/O interfaces.
    • Knowledge of networking interfaces and protocol translation DMA engine design in hardware state machines.
    • Expertise in designing efficient and reusable modules in Verilog. Experience with synthesis and timing constraint development and simulation and validation of the design on FPGA emulation platforms.
    • Strong debugging skills. This includes debugging using simulation tools as well as debugging in lab with test equipment.
    • Proven Communication skills and ability to effectively work with cross-functional, cross-site teams.

    Desirable Skills:

    • Experience with 40nm or lower geometry CMOS design.
    • Knowledge and experience in UVM.
    • Knowledge and experience in designing FPGA systems.
    • Knowledge and experience of C/C++.
    • Knowledge and experience of scripting languages like Perl, TCL/TK, Python etc.
    • Knowledge and experience of HLS methodology and tools.

    Required Experience

    • 7+ years of experience in digital implementation for SOC designs with analog control interfaces and networking interfaces.
    • BE/M.Tech in Electrical/ Electronics Engineering.
    • Emphasis in digital circuit design would be a plus.

     COMPANY OVERVIEW

    MaxLinear is a global, New York Stock Exchange-traded company (NYSE: MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, designing highly integrated, radio-frequency, and mixed-signal Communications ICs for broadband and infrastructure applications.

    We hire the best people in the world and engage them in some of the most exciting opportunities in our broadband and infrastructure markets. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems.

    MaxLinear began by developing the World’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products for satellite communications, cable modems, and terrestrial TV; diversified into high speed products addressing Datacom applications such as 400 Gbps fiber-optic interconnect chips for high-speed networks; and MoCA technology for home networking.

    Our headquarters is in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, CA; in Vancouver, Canada; in Valencia, Spain; and in Bangalore, India.

    We have approximately 800 employees, a substantial majority of whom have engineering degrees, and include masters and Ph.D. graduates from many of the premiere universities around the world. Our engineers thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building great products.

     

  • Qualifications
    • Strong and proven fundamentals in Digital logic design and verification, ASIC design methodology.
    • Experience in the design of embedded processor and multiprocessor environments. Knowledge of memory architecture and systems, bus architectures and standard peripherals.
    • Experience in design of systems with multiple asynchronous clocks.
    • Experience with high speed communication and I/O interfaces.
    • Knowledge of networking interfaces and protocol translation DMA engine design in hardware state machines.
    • Expertise in designing efficient and reusable modules in Verilog. Experience with synthesis and timing constraint development and simulation and validation of the design on FPGA emulation platforms.
    • Strong debugging skills. This includes debugging using simulation tools as well as debugging in lab with test equipment.
    • Proven Communication skills and ability to effectively work with cross-functional, cross-site teams.

    Desirable Skills:

    • Experience with 40nm or lower geometry CMOS design.
    • Knowledge and experience in UVM.
    • Knowledge and experience in designing FPGA systems.
    • Knowledge and experience of C/C++.
    • Knowledge and experience of scripting languages like Perl, TCL/TK, Python etc.
    • Knowledge and experience of HLS methodology and tools.