Job Description

KIOXIA America Inc., formerly Toshiba Memory America Inc., is looking for a Verification Engineer in our San Jose or Folsom SSD R&D department. The ideal candidate will be responsible for RTL verification effort for Data-center SSD controller development, with a particular focus on flash memory subsystem development.  You will interact with all aspects of disciplines to develop reusable UVM testbench and verification environment by deploying the latest methodology with coverage metric driven verification. The daily activities of this engineering position will be  creating verification testbench and testplan documents, driving advance verification methodology and metrics, performing UVM testbench coding,  implementing test case, working on failure debug and Jira reporting, regression scripting, and improving SVA assertion and functional/code coverage to achieve first-pass silicon and product goal. RESPONSIBILITIES

• Understand details of RTL microarchitecture at block/chip-level design
• Definition of the verification testplan in collaboration with the design and architecture teams
• Development and integration of the verification IPs
• Implementation of the code and functional coverage metrics
• Hold detailed verification reviews and set standard for coding quality
• Development of the directed and random regression suite
• Jira debug triage and Git release flow, and failure report
• FW validation and post silicon debug support
• Palladium simulation acceleration with AVIP

REQUIREMENTS

• 3+ years of engineering verification experience
• Hands on experience using UVM and System Verilog
• SSD controller experience is preferred
• NAND interface experience preferred
• Good knowledge on AXI bus is a plus
• Experience writing scripts in languages such as Perl or Python a plus.

Additional Information

REQ# 2005; #LI-JV1 We are an Equal Opportunity Employer including: Minorities/Women/Individuals with Disabilities/Protected