Fulltime Senior Digital ASIC Designer in the Boston area, responsible for designing high-performance digital ASICs in advanced technologies (14nm FinFET, 22FDX, etc.)

Specific Responsibilities:

• Defining and implementing design flows
• Leading design and implementation teams
• Synthesis, P&R, and timing closure
• DFT insertion
• Implement clock and reset nets
• Integrate third-party IP
• Top-level chip integration
• Detailed analysis design and capture
• This role requires familiarity with architectures for secure systems design, such as cryptographic encoders/decoders or tagged processor architectures is a plus.
• Demonstrated experience with successful tapeouts at advanced nodes is required.
• Experience leading and managing design teams is also desired

Required Qualifications:

• Electrical Engineering Degree (PhD or MSEE+6 preferred)
• Strong analytical and problem-solving skills
• Fluent in Verilog/VHDL
• Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc.
• Experience with high-level design, simulation, and verification tools
• Experience with scripting languages Python/PERL and regular expressions
• Ability to acquire and maintain a security clearance

You'll get to the top of the pile with these skills:

• Experience with Linux/UNIX OS, piping, batching, etc.
• Experience with SRAM compilers and architecture tradespace
• Familiarity with memory design for SRAM, DRAM, and NVRAM
• Familiarity with SOC Tradespace including processor selection, memory and bus implementation, and architecture
• Familiarity with hardware security,(encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation)
• Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers