Job Description

Becoming part of the SEAKR team means that Interns actively participate in real-world assignments! SEAKR designs, builds and delivers systems for Data Management, Processing, Avionics and Communications for customers around the world. SEAKR is seeking qualified Undergraduate and Graduate Interns to actively participate in real-world assignments, help solve challenging problems and contribute to the development of the next-generation of space electronics.

Our vision is to be the leader in creating new avenues in electronics’ performance that withstands the harsh environments of space. Our entrepreneurial thinking and distinct ruggedized systems continue to help our customers achieve mission success and benchmark the highest of industry standards and technological prowess. As a vertically integrated company, our employees are involved in the architecture and conceptual designs of software, evolving system technology, and delivering enabling solutions.

Our mentors and team members guide you through your work, help you to integrate into our culture of collaboration and further develop and gain new skills. At the end of your internship, we ask you to summarize your work experience and lessons learned through a formal presentation to the company leadership team.

Start Date: May 20, 2024

End Date: August 8, 2024

Additional opportunities provided through the internship program are:

• Unlimited job shadowing opportunities – in any of SEAKR’s departments
• Executive Speaker Presentations
• Day trip to a Colorado Rockies baseball game
• New Hire Interview Panel
• End of internship celebratory cookout
• Internship may lead to future fulltime employment at SEAKR upon successful completion of degree(s)
• Relocation Assistance will NOT be provided for internship participants

SEAKR is seeking an FPGA Hardware Engineering Intern who will be working to create a Xilinx board file for our Baccarat Versal design. The board file uses an XML format to define information about the Baccarat board. The information contained in the board file can be used within the Vivado Design Suite, and Vivado IP integrator, to enable and confirm connections of the Versal to the board. Having the board file specifically for the Baccarat board allowing for quick design validation and delivery, and even allowing customers the ability to take on the design work.

Candidate should have basic understanding of Xilinx FPGA's, HDL, board schematics, XML, and good communication skills.

Qualifications

• Must be a rising Sophomore or higher currently pursuing a degree in Computer Science or Computer Engineering, Systems Engineering, Software Engineering, or related discipline. Preference is pursuing an Electrical Engineering degree with completed FPGA classes.
• Ability to learn technologies quickly and independently
• Strong computer skills in a PC environment using various business software programs (spreadsheets, word-processing, and databases)
• Highly organized and detail oriented
• Strong interpersonal, written and verbal communication, follow-up, problem solving and creative thinking skills
• Base knowledge of FPGA design tools required
• Base knowledge of Verilog required

Additional Information

• Compensation: Base pay range is $25-28/hour depending on qualifications.
• SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines.
• US Citizenship Required