Allen Peng

Bachelor's

Computer Engineering

UIUC Department of ECE

- Worked in RTL verification research team under the guidance of Prof. Rakesh Kumar's graduate students - Benchmarked aspects of a two-way superscalar out of order processor implemented with explicit register renaming - Includes branch history table and one bit saturating counter, nonblocking and pipelined i-cache, memory matrix for out of order loads, dadda multiplier, and synopsys divider - Operates at a frequency of 452 MHz and runs high ILP programs(raytracing) with an IPC of - 0.7 - Gained experience in synthesizing programs using Synopsys VCS and debugging waveforms through ModelSim